1. Field of the Invention
The present invention relates to a gas discharge display apparatus for displaying a character or an image by light emission utilizing gas discharge which is for use in an image display apparatus such as a television or an advertizing display panel, and a method for driving the same. In particular, the present invention relates to a gas discharge apparatus used in the form of an AC-type plasma display panel (hereinafter, referred to as a "PDP") and a method for driving the same.
2. Description of the Related Art
Gas discharge display apparatuses have a large display area despite a small depth thereof and realize color display. For such advantages, use of gas discharge display apparatuses is now being extended rapidly. Gas discharge display apparatuses are available in various types. One type of gas apparatus suitable for image display is an AC-type PDP. Gas discharge display apparatuses of this type, which are disclosed in Japanese Laid-Open Patent Publication Nos. 59-79938 and 61-39341, and Japanese Patent Publication No. 62-31775, have a memory function.
Briefly referring to FIGS. 1A and 1B, a conventional AC-type PDP 1000 will be described. FIG. 1A is a plan view of the AC-type PDP 1000, illustrating an arrangement of electrodes. FIG. 1B is a cross sectional view of the AC-type PDP 1000 taken along line 1B-1B' in FIG. 1A.
As is shown in FIGS. 1B, the AC-type PDP 1000 includes a first glass substrate 3 and a second glass substrate 8 opposed to each other. The first glass substrate 3 and the second glass substrate 8 form an outer casing of the AC-type PDP 1000 together. On an inner face of the first glass substrate 3, a first electrode group including a plurality of scanning electrodes (first discharge electrodes) 1 and a plurality of sustaining electrodes (second discharge electrodes) 2 is located. A dielectric layer 4 is located on the first glass substrate 3, covering the first electrode group, and a protection layer 5 is located on the dielectric layer 4. On an inner face of the second glass substrate 8, a second electrode group including a plurality of data electrodes (third discharge electrodes; also referred to as "address electrodes") 7 is located.
As is illustrated in FIG. 1A, the scanning electrodes 1a through in (only 1a, 1b and 1c are shown here) and the sustaining electrodes 2a through 2n (only 2a, 2b and 2c are shown here) are provided in parallel alternately. The data electrodes 7a through 7m (only 7a and 7b are shown here) are provided in parallel so as to perpendicularly cross the scanning electrodes 1a through 1n and the sustaining electrodes 2a through 2n. Adjacent scanning electrode and sustaining electrode (for example, 1a and 2a) form a pair. A projecting area of the scanning electrode and a projecting area of the sustaining electrode forming a pair are opposed to each other in an area S (FIG. 1A), where sustaining discharge occurs. The area S will be referred to as a "discharge area".
The second electrode group including the data electrodes 7a through 7m is opposed to the protection layer 5 with a discharge space 6 full of discharge gas interposed therebetween. The dielectric layer 4 is formed of borosilicate glass or the like, and the protection layer 5 is formed of MgO or the like.
As is illustrated in FIG. 2, the scanning electrodes 1a through 1n, the sustaining electrodes 1a through 1n, and the data electrodes 1a through 1m are arranged orthogonally in a lattice. The scanning electrodes 1a through 1n are connected to a scanning electrode driving circuit 10, the sustaining electrodes 2a through 2n are connected to a sustaining electrode driving circuit 11, and the data electrodes 7a through 7m are connected to a data electrode driving circuit 12.
Another conventional AC-type PDP 2000 will be described with reference to FIGS. 3A and 3B. FIG. 3A is a plan view of the AC-type PDP 2000, illustrating an arrangement of electrodes, and FIG. 3B is a cross sectional view of the AC-type PDP 2000 taken along line 3B-3B' in FIG. 3A. In FIG. 3A, the letter P denotes a pixel area, and letter S denotes a discharge area. In FIGS. 3A and 3B, the same elements as those in FIGS. 1A and 1B bear the same reference numerals therewith.
As is illustrated in FIG. 3B, the AC-type PDP 2000 includes three types of phosphor layers R, G and B for emitting light of red, green and blue which are located on the inner face of the second glass substrate 8 in order to perform a color display. The phosphor layers R, G and B are located in positional correspondence with discharge areas S shown in FIG. 1A, and are excited to emit light upon receiving ultraviolet rays generated by discharge caused in the discharge areas S.
A method for driving such AC-type PDPs 1000 and 2000 is disclosed in, for example, Japanese Patent Publication No. 62-61278 and Japanese Laid-Open Patent Publication No. 4-170581. In the latter publication, the driving method is described as a method for driving a dot matrix display panel.
With reference to FIG. 4, a conventional method for driving an AC-type (1000 or 2000) PDP will be described.
First, in the writing operation performed in a writing period, a positive writing pulse having an amplitude of +Vw shown in waveform DATA in FIG. 4 is applied to at least one data electrode selected from the data electrodes 7a through 7m (for example, the data electrode 7a) which corresponds to a pixel for displaying an image in accordance with the scanning electrode 1a. Simultaneously, a negative scanning pulse having an amplitude of -Vs shown in waveform SCN1 is applied to the scanning electrode 1a. By such application, discharge occurs at an intersection W1 (FIG. 1A) of the data electrode 7a and the scanning electrode 1a, and thus a positive charge is stored in an area of a surface of the protection layer 5, the area positionally corresponding to the intersection W1. In other words, such an area acts as a write cell.
Next, a positive writing pulse having an amplitude of +Vw shown in waveform DATA is applied to at least one data electrode selected from the data electrodes 7a through 7m (for example, the data electrode 7a) which corresponds to a pixel for displaying an image in accordance with the scanning electrode 1b. Simultaneously, a negative scanning pulse having an amplitude of -Vs shown in waveform SCN2 is applied to the scanning electrode 1b. By such application, discharge occurs at an intersection W2 (FIG. 1A) of the data electrode 7a and the scanning electrode 1b, and thus a positive charge is stored in an area of the surface of the protection layer 5, the area positionally corresponding to the intersection W2. In other words, such an area acts as a write cell.
In this manner, during the process of applying negative scanning pulses having an amplitude of -Vs shown in waveforms SCN1 through SCNn to the scanning electrodes 1a through 1n respectively, a positive writing pulse having an amplitude of +Vw is applied to at least one selected data electrode which corresponds to a pixel for displaying an image in accordance with the respective scanning electrode. Thus, a positive charge is stored in a prescribed area (write cell) of the surface of the protection layer 5.
The writing operation is followed by the sustaining operation performed in a sustaining period. In the sustaining operation, a negative sustaining pulse having an amplitude of -Vs shown in waveform SUS is applied to all the sustaining electrodes 2, and negative sustaining pulses having an amplitude of -Vs shown in waveforms SCN1 through SCNn are applied to all the scanning electrodes 1, respectively. The pulse application to the sustaining electrodes 2 and the pulse application to the scanning electrodes 1 are performed alternately. The application of the first sustaining pulse to each sustaining electrode 2 discharges the positive charge stored on the protection layer 5, and thus sustaining discharge occurs on the discharge area S which belongs to the same discharge cell as the respective intersection. The alternate application of the negative sustaining pulse to each sustaining electrode 2 and each scanning electrode 1 continues the sustaining discharge on the respective discharge area S. By light emission caused by such sustaining discharge, characters and images are displayed.
In the erasing operation performed in an erasing period, a negative erasing pulse having an amplitude of -Ve and a small width t.sub.WE shown in waveform SUS is applied to all the sustaining electrodes 2. (Hereinafter, a pulse having a small width will be referred to as a "narrow pulse".) By such application, erasing discharge occurs, and thus the charge stored on the protection layer 5 by sustaining discharge is completely erased. As a result, the sustaining discharge does not continue even if a sustaining pulse is applied. Thus, the sustaining operation is terminated.
Conventionally, the erasing pulse applied to the sustaining electrodes has an absolute value of the amplitude which is smaller than the that of the sustaining pulse, or has a width smaller than that of the sustaining pulse. In order to enlarge the margin for the erasing operation, both of the absolute value of the amplitude and the width of the erasing pulse need to be smaller than those of the sustaining pulse. Alternatively, a plurality of erasing pulses having small but different widths may be applied.
In order to stabilize the writing, sustaining and erasing operations, the rise and fall of each of the writing, scanning, sustaining and erasing pulses are applied with steep rise and fall. The time period required for the change in the voltage at the rise and fall is generally set to be as short as several hundred nanoseconds.
The luminance of light obtained by performing sustaining discharge once is determined by the amplitude of the sustaining pulse, the capacitance between the scanning electrodes 1a through 1n and the surface of the protection layer 5, the capacitance between the sustaining electrodes 2a through 2n and the surface of the protection layer 5, and the like. However, the amplitude of each pulse is substantially determined by characteristics of the AC-type PDP and thus cannot be changed arbitrarily. The structure of the AC-type PDP, the material of the electrodes, the type of the discharge gas, the sealing pressure and the like cannot be changed after the AC-type PDP is produced. Accordingly, the luminance of light can be controlled simply by changing the number of times the sustaining discharges is repeated (namely, the number of pulses) per time unit.
Next, the above-described operations will be described in detail with reference to FIGS. 5A through 5G. FIGS. 5A through 5G illustrate existing and moving states of the wall charges in a discharge cell in each step of the above-described operations.
FIGS. 5A through 5G are cross sectional views of a conventional AC-type PDP which is similar to the AC-type PDPs shown in FIGS. 1B and 3B. In FIGS. 5A through 5G, the data electrode 7 on the inner face of the second glass substrate 8 is covered with a second dielectric layer 9, and the phosphor layers R, G and B (only R is shown in FIG. 5A) are located on the second dielectric layer 9. The AC-type PDP illustrated in FIGS. 5A through 5G has the same structure as the structure of the AC-type PDPs 1000 and 2000 shown in FIGS. 1B and 3B except for the above-described points. The same elements as in the AC-type PDPs 1000 and 2000 bear the same reference numerals therewith.
FIG. 5A shows an initial state before the AC-type PDP is turned on. The discharge cell of the AC-type PDP has no wall charge.
As is shown in FIG. 5B, in the writing period after the AC-type PDP is turned on, a writing pulse having an amplitude of +Vw (V) is applied to the data electrode 7 and a negative scanning pulse having an amplitude of -Vs (V) is applied to the scanning electrode 1. Then, writing discharge occurs at the intersection of the data electrode 7 and the scanning electrode 1. A negative wall charge is stored in an area of a surface of the second dielectric layer 9 corresponding to the data electrode 7, and a positive wall charge is stored in an area of the surface of the protection layer 5 corresponding to the scanning electrode 1.
As is shown in FIG. 5C, in the sustaining period, a negative sustaining pulse having an amplitude of -Vs (V) is applied to the sustaining electrode 2. Thus, a positive wall charge is stored in an area of the surface of the protection layer 5 corresponding to the sustaining electrode 1. The voltage generated by the positive wall charge is superimposed on the voltage of the sustaining pulse and applied between the area of the surface of the protection layer 5 corresponding to the scanning electrode 1 and the area of the protection layer 5 corresponding to the sustaining electrode 2. Accordingly, sustaining discharge occurs between the above-mentioned two areas. As a result, a negative wall charge is stored on the area of the protection layer 5 corresponding to the scanning electrode 1, and a positive wall change stored on the area of the protection layer 5 corresponding to the sustaining electrode 2.
Further in the sustaining period, as is shown in FIG. 5D, a negative sustaining pulse having an amplitude of -Vs (V) is applied to the scanning electrode 1. Then, the voltage generated by the negative wall charge stored on the area of the protection layer 5 corresponding to the scanning electrode 1 by the sustaining discharge and the voltage generated by the positive wall charge stored on the area of the protection layer 5 corresponding to the sustaining electrode 2 are superimposed on the voltage of the sustaining pulse and applied between the area of the protection layer 5 corresponding to the scanning electrode 1 and the area of the protection layer 5 corresponding to the sustaining electrode 2. Thus, sustaining discharge occurs again between the above-mentioned two areas but in the opposite direction. As a result, a negative wall charge is stored on the area of the protection layer 5 corresponding to the sustaining electrode 2, and a positive wall charge is stored on the area of the protection layer 5 corresponding to the scanning electrode 1.
Still further in the sustaining period, as is shown in FIG. 5C again, a negative sustaining pulse having an amplitude of -Vs (V) is applied to the sustaining electrode 2. Then, the voltage generated by the negative wall charge stored on the area of the protection layer 5 corresponding to the sustaining electrode 2 by the sustaining discharge and the voltage generated by the positive wall charge stored on the area of the protection layer 5 corresponding to the scanning electrode 1 are superimposed on the voltage of the sustaining pulse and applied between the area of the protection layer 5 corresponding to the scanning electrode 1 and the area of the protection layer 5 corresponding to the sustaining electrode 2. Accordingly, sustaining discharge occurs again between the above-mentioned two areas. As a result, a negative wall charge is stored on the area of the protection layer corresponding to the scanning electrode 1, and a positive wall charge is stored on the area of the protection layer 5 corresponding to the sustaining electrode 2.
In this manner, sustaining discharge (movement of charges) occurs repeatedly in the sustaining period as is shown in FIGS. 5C and 5D, and the phosphor layers R, G and B are excited by ultraviolet rays generated by the repeated sustaining discharge, thereby performing display.
As is shown in FIG. 5E, in the erasing period, a negative narrow erasing pulse having an amplitude of -Vs (V) is applied to the sustaining electrode 2. Then, the voltage generated by the negative wall charge stored on the area of the protection layer 5 corresponding to the sustaining electrode 2 by the sustaining discharge and the voltage generated by the positive wall charge stored on the area of the protection layer 5 corresponding to the scanning electrode 1 are superimposed on the voltage of the negative narrow erasing pulse and applied between the area of the protection layer 5 corresponding to the scanning electrode 1 and the area of the protection layer 5 corresponding to the sustaining electrode 2. Accordingly, erasing discharge occurs again between the above-mentioned two areas. However, since such erasing discharge is maintained for a short period of time due to the narrow pulse, the discharge is terminated midway. Accordingly, by setting the width of the narrow erasing pulse to be optimum, the wall charge on the area of the protection layer corresponding to the sustaining electrode 1 and the wall charge on the area of the protection layer 5 corresponding to the scanning electrode 2 can be neutralized. Thereafter, sustaining discharge does not occur even if a sustaining pulse is applied unless a writing pulse is applied again. Accordingly, discharge is kept in a pause. The level of the residual wall charge in FIG. 5E is less than the level of the residual wall charge in FIG. 5B because the wall charge is partially extinguished during the sustaining discharge.
As is shown in FIG. 5F, in the writing period, a positive pulse having an amplitude of +Vw (V) is applied to the data electrode 7 and a negative scanning pulse having an amplitude of -Vs (V) is applied to the scanning electrode 1. Then, writing discharge occurs between an area of the second dielectric layer 9 corresponding to the data electrode 7 and the area of the protection layer 5 corresponding to the scanning electrode 1. By such writing discharge, a negative wall charge is stored on the area of the second dielectric layer 9 corresponding to the data electrode 7, and a positive wall charge is stored on the area of the second dielectric layer 9 corresponding to the scanning electrode 1 in addition to the residual wall charge shown in FIG. 5E. As a result, the level of the charge in FIG. 5E becomes equal to the level of the charge in FIG. 5B. By repeating the operation illustrated in FIGS. 5F, 5C, 5D and 5E in this manner, an image is displayed.
In the above-described conventional example, a method for driving the AC-type PDP in which the date electrodes 7 are covered with the second dielectric layer 9 and phosphor layers R, G and B are provided on the second dielectric layer 9 is described. The same method can be used for driving an AC-type PDP in which display is performed directly utilizing light emitted by discharge and thus has no phosphor layer. The same method can also be used for driving an AC-type PDP in which the data electrodes 7 are directly covered with a phosphor layer without the second dielectric layer 9. In such a case, the phosphor layer acts in the same manner as the second dielectric layer 9. The same method can still be used for driving an AC-type PDP in which the data electrodes 7 are exposed to the discharge space 6 without the second dielectric 9 or the phosphor layer. In such a case, although no wall charge is stored on the area of the second dielectric layer 9 corresponding to the data electrodes 7, an equivalent wall charge is stored on the area of the protection layer 5 corresponding to the scanning electrode 1.
A conventional scanning electrode driving circuit 30 will be described with reference to FIGS. 6 and 7. FIG. 6 is a circuit diagram of the scanning electrode driving circuit 30. The scanning electrode driving circuit 30 includes p-channel MOSFETs 13 withstanding a high voltage and n-channel MOSFETs 14 also withstanding a high voltage. The p-channel MOSFETs 13 are respectively connected to scanning electrodes 1a through 1n through a drain electrode thereof, and the n-channel MOSFETs 14 are also respectively connected to scanning electrodes 1a through 1n through a drain electrode thereof. A source of each p-channel MOSFET 13 is grounded, and a source of each n-channel MOSFET 14 is connected to a high voltage power source of -200 V. Each p-channel MOSFET 13 and each n-channel MOSFET 14 form an output section of a push-pull system withstanding a high voltage.
The p-channel MOSFETs 13 are connected to a scanning logic circuit 16 via a level shift (L/S) circuit 15 withstanding a high voltage, and the n-channel MOSFETs 14 are directly connected to the scanning logic circuit 16.
The scanning logic circuit 16 includes a shift register 17, a first gate 18, a second gate 19 and an inverter 20. A common line which is the basis for a signal level in the scanning logic circuit 16 is connected to the high voltage power source of -200 V.
FIG. 7 is a timing chart illustrating operation in the scanning electrode driving circuit 30.
When a scanning data signal SI and a clock signal CLK are input to the shift register 17, the scanning data signal SI is taken in at the falling edge of the clock signal CLK. The level of outputs from the shift register 17 becomes low one by one, and a scanning signal is output. Only while the level of a blanking signal BLK is low, the scanning signal passes through the first gate 18, the second gate 19, the inverter 20, and the level shift circuit 15 and is applied to each p-channel MOSFET 13 and each n-channel MOSFET 14. Thus, a scanning pulse is applied to the scanning electrode 1a through 1n one by one.
In the sustaining period, when a sustaining signal SU, is input to the second gate 19, a sustaining pulse is applied to all the scanning electrodes 1a through 1n simultaneously.
Conventionally, in order to reduce the size of the scanning electrode driving circuit 30 illustrated in FIG. 6, the scanning electrode driving circuit 30 is divided into an appropriate number of blocks to form a monolithic IC.
The conventional AC-type PDPs which are described above have the following problems.
(1) The conditions for setting the erasing operation are stringent as is described above. If the conditions are set inappropriately, right image reproduction cannot be performed due to the influence of the residual charge. The potential in the discharge area S is dispersed easily by different discharge cells, and discharge characteristics change over time.
In addition, since the width of the erasing pulse is small, the start of erasing discharge can be delayed by fluctuation in the width of the erasing pulse when the erasing pulse is applied. In such a case, the charge stored in the discharge area S cannot be erased completely.
In detail, the tolerance for the fluctuation in the width t.sub.WE and the amplitude -Ve of the erasing pulse cannot be large. Accordingly, if the characteristics are dispersed in different discharge cells, erasing discharge can be performed excessively or insufficiently in some discharge cells. Since the charge stored on the protection layer 5 is not completely erased in such discharge cells, a sufficient margin for erasing operation cannot be obtained. Excessive erasing discharge means that, after the charge stored on the protection layer 5 is erased, a charge having an opposite polarity is stored. Insufficient erasing discharge means that the charge stored on the protection layer 5 cannot be reduced to zero.
(2) When the positive charge stored on the area of the protection layer 5 corresponding to the intersection (for example, W1 or W2 in FIG. 1A) of a scanning electrode and a data electrode moves to the discharge area S, the level of the charge moving to sub-area S.sub.1 is different from the level of the charge moving to sub-area S.sub.2 because sub-area S.sub.1 is closer to the intersection W1 than sub-area S.sub.2. Accordingly, the charge distribution in the discharge area S is not uniform. As a result, when an erasing pulse is applied, the level of the charge is non-uniform in the area of the protection layer 5 corresponding to the discharge area S. Thus, the erasing operation cannot be uniform in the entire discharge area S.
(3) In the case of color display, if the widths of the scanning electrodes and the sustaining electrodes opposed to each other in the discharge area S are reduced in order to obtain a pixel area P which is substantially square, the discharge area S is also reduced. As a result, sufficient luminance cannot be obtained especially in a large color display apparatus.
(4) Even when the discharge is set to be performed 60 times per second as is generally done in a personal computer, a television and the like, the luminance is excessively high when the efficiency of the AC-type PDP is high. Under the circumstances, images can be displayed at a high luminance but not at a low luminance.
(5) Discharge current flowing during the sustaining period concentrates when the level of the sustaining pulse is changed as is shown in FIG. 4. Accordingly, the peak value Ip of the discharge current is excessively large compared with the average value Ia.
As a result, the circuit for supplying a power source requires a capacitor having a large capacity for smoothing the current and a switching transistor for supplying a large peak current. Further, in order to prevent an adverse effect of noise generated by such a large peak current on the circuit operation, a noise removal circuit and a multiple-layer substrate are required.
(6) In the conventional scanning electrode driving circuit 30, an output section of a push-pull system withstanding a high voltage including the p-channel MOSFET 13 and the n-channel MOSFET 14 is required for each of the scanning electrodes 1a through 1n. The level shift circuit 15 withstanding a high voltage is also required. Accordingly, incorporation of the scanning electrode driving circuit 30 into an IC is difficult. Even if the scanning electrode driving circuit 30 is incorporated into an IC, the chip area is sufficiently large to raise production cost. If a shortcircuit occurs between the scanning electrodes 1a through 1n, the scanning electrode driving circuit 30 breaks down.
(7) The writing operation shown in FIG. 5F requires writing discharge caused in the state where the residual wall charge remains after the erasing period shown in FIG. 5E is terminated. However, the residual wall charge acts in the direction to counteract the voltage of the writing pulse, writing discharge is more difficult to be realized when compared with the state shown in FIG. 5B. Even if writing discharge occurs, the difference between the wall charge on the area of the protection layer 5 corresponding to the scanning electrode 1 and the wall charge on the area of the protection layer 5 corresponding to the sustaining electrode 2 is too small to easily start sustaining discharge. As a result, no light is emitted in some discharge cells.
In the case that the AC-type PDP is turned on to start operating in the state where the wall charge has already been distributed as is shown in FIG. 5G, namely, in the state where a negative wall charge is stored on the area of the second dielectric layer 9 corresponding to the data electrodes 7 and a positive wall charge is stored on the area of the protection layer 5 corresponding to the scanning electrodes 1 and the sustaining electrodes 2, the wall charges act in a direction counteracting the voltage of the writing pulse. Accordingly, writing discharge and sustaining discharge are both difficult to occur, and the discharge operation is not performed until the wall charges shown in FIG. 5G are naturally extinguished. As a result, the rising time for the display after the AC-type PDP is turned on, namely, the time period which is required for the AC-type PDP to perform normal display after the AC-type PDP is turned on is extended.
FIG. 8 is a plan view of a conventional image display panel 40 such as a PDP, a liquid crystal display (LCD) panel, a panel using an electroluminescent lamp (EL), or a panel using a fluorescent display tube. As is illustrated in FIG. 8, such a panel includes a flat casing 21 having a rectangular front wall 22. An image display area DA is set on the rectangular front wall 22. Inside the flat casing 21, electrodes for display are sealed. The front wall 22 is formed of a glass plate. A mosaic-like large display screen is formed by arranging a plurality of such image display panels 40 in a lattice, in a plurality of lines and a plurality of columns. Such a large display screen is used for a television or an advertising display panel.
In forming a large display screen by a plurality of such image display panels 40, the panels 40 are arranged two dimensionally so that there is no gap between two adjacent panels 40. However, since the front wall 22 is formed of glass, a non-display area 23 shaped as a rectangular frame and surrounding each image display panel 40, namely, a side wall of the flat casing 21 and the sealing material such as frit glass, appear through the front wall 22. Accordingly, such a non-display area 23 inevitably appears on the large display screen as non-light emitting dark lines in a lattice. Such a lattice significantly spoil the display quality.
In the case when one image display panel 40 has only a small number of pixels, for example, two, the dark lines are not very disturbing from far since the lines are scattered on the large display screen. However, display devices which are used for a high precision image display apparatus and an image display apparatus for indoor use, a great number of pixels are used at a high density. In such a state, the junction between two adjacent image display panel 40 is conspicuous as a dark lattice, and moreover the reproduced image is distorted.